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 M62023L/P/FP
System Reset IC with Switch for 3V Memory Back-up
REJ03D0528-0200 Rev.2.00 Jun 15, 2007
General Description
The M62023L/P/FP is a system reset IC that controls the memory backup function of an SRAM and an embedded RAM of a microcontroller. The IC outputs reset signals (RES/RES) to a microcontroller at power-down and power failure. It also shifts the power supply to RAMs from main to backup, outputs a signal (CS) that invokes standby mode, and alters RAMs to backup circuit mode.
Features
* * * * * * Built-in switch for selection between main power supply and backup power supply to RAMs Small difference between input and output voltages (IOUT = 80mA, VIN=3V): 0.15V typ. Detection voltage (power supply monitor voltage): 2.57V typ. Chip select signal output (CS) Two channels of reset outputs (RES/RES) Power on reset circuit.
Application
Power supply control systems for memory of microcontroller systems in electronic equipment such as OA equipment, industrial equipment, and home-use electronic appliances and SRAM boards with built-in backup function that require switching between external power supply and battery.
Block Diagram
SW VIN 3 R1 Com Reset Circuit R2 1.24V 8 CS D1 2 VBAT 1 VOUT
RES RES
7 5
Delay Circuit
4
Ct
6 GND
REJ03D0528-0200 Rev.2.00 Jun 15, 2007 Page 1 of 12
M62023L/P/FP
Pin Arrangement
M62023L 8 CS 7 RES 6 GND 5 RES 4 Ct 3 VIN 2 VBAT 1 VOUT (Top view) Outline: PRSS0008AA-A (8P5) [L] VOUT 1 VBAT 2 VIN 3 Ct 4 (Top view) Outline: PRDP0008AA-A (8P4) [P] PRSP0008DE-C [FP] (recommend) PRSP0008DA-A (8P2S-A) [FP] (not recommend for new design) M62023P M62023FP 8 CS 7 RES 6 GND 5 RES
Pin Description
Pin No. 1 Symbol VOUT Name Power supply output Function VIN and VBAT are controlled by means of an internal switch and output through VOUT. The pin is capable of outputting up to 100mA. Use it as VDD of CMOS RAM and the like. Backup power supply is connected to this pin. If a lithium battery is used, insert a resistor in series for safety purposes. +3V input pin. Connect to a logic power supply. A delay capacitor is connected to this pin. By connecting a capacitor, it is possible to delay each output. Connect to the positive reset input of a microcontroller. The pin is capable of flowing 1mA sink current. Reference for all signals. Connect to the negative reset input of a microcontroller. The pin is capable of flowing 1mA sink current. Connect to the Chip Select of RAM. The CS output is at low level in normal state thereby letting RAM be active. Under failure or backup condition, the CS output is set to high level, then RAM enters standby state disabling read/write function. The pin is capable of flowing a 1mA sink current.
2 3 4 5 6 7 8
VBAT VIN Ct RES GND RES CS
Backup power supply input Power supply input Delay capacitor connection pin Positive reset output Ground Negative reset output Chip select output
REJ03D0528-0200 Rev.2.00 Jun 15, 2007 Page 2 of 12
M62023L/P/FP
Absolute Maximum Ratings
(Ta = 25C, unless otherwise noted.)
Item Input voltage Output current Power dissipation Thermal derating Operating temperature Storage temperature Symbol VIN IOUT Pd K Topr Tstg Ratings 7 100 800 (L) / 625 (P) / 440 (FP) 8 (L) / 6.25 (P) / 4.4 (FP) -20 to +75 -40 to +125 Unit V mA mW mW/C C C Ta 25C Conditions
Electrical Characteristics
(Ta = 25C, unless otherwise noted.)
Item Detection voltage Hysteresis voltage Circuit current Difference between input and output voltage Ct output voltage (high level) Ct output voltage (low level) RES output voltage (high level) RES output voltage (low level) RES output voltage (high level) RES output voltage (low level) CS output voltage (high level) CS output voltage (low level) Backup Di leak current Backup Di forward direction voltage Delay time Response time RES limit voltage of operation Sysbol VS VS ICC VDROP VOH(Ct) VOL(Ct) VOH(RES) VOL(RES) VOH(RES) VOL(RES) VOH(CS) VOL(CS) IR VF tpd td VOPL (RES) Min 2.44 50 -- -- -- -- 2.0 -- 1.5 -- -- 2.5 -- -- 1.3 2.40 -- -- -- -- -- 10 -- -- Typ 2.57 100 1.5 6.5 0.1 0.15 2.4 0.02 2.0 0.02 0.04 3.0 0.02 0.04 1.6 2.47 0.07 0.08 -- -- 0.54 27 5.0 0.65 Max 2.70 200 3.0 10 0.2 0.3 -- 0.1 -- -- 0.2 -- -- 0.2 -- -- -- 0.3 0.5 0.5 0.6 55 25.0 -- Unit V mV mA Test Conditions VIN (At change from HL) VS = VSH - VSL IOUT = 0mA VIN = 2V VIN = 3V VIN = 3V *
1 1
V V V V V V V V V A V ms s V
VIN = 3V IOUT = 50mA IOUT = 80mA
VIN = 2V * 1 VIN = 2V * VIN = 3V * VIN = 3V, Isink = 1mA VIN = 3V *
1 1 1
VIN = 2V * VIN = 2V, Isink = 1mA VIN = 2V * 2 VIN = 0V, VBAT = 3V * VIN = 3V * VIN = 3V, Isink = 1mA VBAT = 3V IF = 10A VIN = 0V3V, Ct = 4.7F VIN = 3V2V *
3 1 2
VIN = 3V VIN = 0V
Notes: 1. Regarding conditions to measure VOH and VOL, voltage values are generated by internal resistance only and no external resistor is used. 2. These values are produced inserting an external resistor, RCS = 1M, between the CS pin and GND. 3. With no external resistor (10k internal resistance only).
REJ03D0528-0200 Rev.2.00 Jun 15, 2007 Page 3 of 12
M62023L/P/FP
Application Example
+3.0V (Main Power Supply) 3 D1 CIN*1 VDD R2 MCU or CPU 1.24V RES 7 5 RES
Delay Circuit
M62023 VIN R1 SW 1 Com
Reset Circuit
VOUT
Battery 3V
VBAT 2 CS
COUT*1
VDD
8
4
Ct
CMOS RAM
GND 6
Ct
REJ03D0528-0200 Rev.2.00 Jun 15, 2007 Page 4 of 12
M62023L/P/FP
Configuration
The internal reference voltage Vref is compared by means of a comparator with resistor divided voltage VR (resistordivided voltage produced by R1 and R2 from VIN). If the input voltage is 3V, VR is set to 1.24V or higher, so the comparator output is at low level and the Ct output (Q1 collector output) is set to high level. If the input voltage drops to below 2.57V in an abnormal condition, VR becomes below 1.24V, so the comparator output goes from low to high level and the Ct output, from high to low. The input voltage at this point is called VSL. Next, when the input voltage, restored from abnormal state, has a rise, the comparator output goes from high to low level and the Ct output, from low to high. The comparator used for detection has 100mV hysteresis (Vs), so that malfunctioning is prevented in case that the input voltage slowly drops or VR nearly equals Vref.
Ct output VO (Ct) (V)
3.0 Vs VSL VSH
2.0 1.0 0
2.4 2.5 2.6 2.7 2.8 2.9 Input voltage VIN (V)
Connecting an external capacitor to the Ct pin lets RES, RES, CS, and VOUT be delayed due to RC transient phenomenon (electric charge). Delay time is determined as follows.
Delay time (tpd) = CtxR3xIn [VOH(Ct)-VOL(Ct)] [VOH(Ct)-INV1(VTH)]
3
Note: Ct is an external capacitance.
Taking into consideration the time taken by the oscillator of microcomputer to be stable, connect a 4.7F capacitor to the Ct pin. (As the response time of detection can be slowed due to internal structure depending on the rising rate of power supply, avoid connecting a too large capacitance.)
tpd VOH (Ct) INV1 (Vth) VOL (Ct) Delayed output waveforms of Ct
REJ03D0528-0200 Rev.2.00 Jun 15, 2007 Page 5 of 12
M62023L/P/FP Since waveforms show a gentle rise due to the RC delay circuit, INV1, INV2, and R6 constitute a Schmitt trigger circuit to produce hysteresis so as to prevent each output from chattering.
Internal Circuit
Ct
4
VIN
3
RES
5
RES
7
Q4 R1 25.6k R3 22k Com R6 47k R7 10k
R8 10k
1
VOUT
VR
R4 0 Q1
R5 10k
D1
R10 800
Q2 INV1 INV2 INV3 INV4
R11 10k
2
VBAT
Q3 R2 24k Vref 1.24V INV5 INV6 INV7 INV8 INV9 R9 5k R10 22k Q5
8
CS
6
GND
REJ03D0528-0200 Rev.2.00 Jun 15, 2007 Page 6 of 12
M62023L/P/FP
Timing Chart
tpd 3V VSH VSL VIN 0V Vs tpd
V1 VOUT
V2
V3
CS
V2 V3
VOL(CS) 3V VIN(VSL) RES VOL(RES) VOH(RES) VIN(VSL) RES VOL(RES) V1=VIN-VDROP V2=VIN-VEB(SW Tr.) V3=VBAT-VF
Input voltage In normal operation Output pin Input voltage: 3V In failure (instantaneous drop) Input voltage: 3V2V Each output varies if the input voltage drops to VSL or under Restoration from failure (instantaneous drop) Input voltage: 2V3V If the input voltage goes higher than VSL by 100mV, each output varies after delay produced by the delay circuit. SW Tr. is turned ON after delay and a voltage (VIN-VDROP) is output. A logic high is maintained, and then shifts to a logic low. In backup state Input voltage: 0V Backup voltage: 3V
VOUT
With SW Tr. set to ON, a voltage (VIN-VDROP) is output. The output level is VOL (RES) with a logic low.
SW Tr. is turned OFF. A voltage (VIN-VEB) is output by the diode between E and B of SW Tr. As the state shifts from a logic low to logic high, the output level becomes approximately equal to the input voltage. As the state shifts from a logic high to logic low, the output level becomes VOL(RES) As the state shifts from a logic low to logic high, the output level becomes the voltage VIN-VEB.
VBAT-VF
RES
RES
The output level is VOH(RES) with a logic high. The output level is VOL(CS) with a logic low.
A logic low is maintained, and then shifts to a logic high. A logic high is maintained, and then shifts to a logic low. The output is a logic high and the output level is VBAT-VF
CS
REJ03D0528-0200 Rev.2.00 Jun 15, 2007 Page 7 of 12
M62023L/P/FP
Typical Characteristics
Thermal Derating (Maximum Rating) 1000
Power dissipation P d (mW)
M62023L
800
M62023P
600
M62023FP
400 200 0
0
125 100 75 Ambient temperature Ta (C) 50
25
Detection Voltage vs . Ambient Temperature 2.64
Detection voltage Vs (V)
Hysteresis Voltage vs . Ambient Temperature 140 130 120 110 100
v
2.63 2.62 2.61 2.60 2.59 2.58 2.57 2.56 -20 0 20 40 60 80 100
Tj = 25C
90 80 70 60 -20 0 20 40 60 80 100 Ambient temperature Ta (C)
Ambient temperature Ta (C)
10
Circuit current Icc (mA)
Circuit Current vs. Ambient Temperature VIN = 3V
Circuit current Icc (mA)
4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5
Circuit Current vs. Ambient Temperature VIN = 2V
9 8 7 6 5 4 3 2
-20 0
20 40 60 80 100
0
-20 0
20 40 60 80 100
Ambient temperature Ta (C)
Ambient temperature Ta (C)
REJ03D0528-0200 Rev.2.00 Jun 15, 2007 Page 8 of 12
M62023L/P/FP
Output Current vs. Difference Between Input and Output Voltages 100 Difference Between Input and Output Voltages vs. Ambient Temperature 400 VIN = 3V 350 VIN = 3V
Output current IOUT (mA)
Difference between input and output voltages VDROP (mV)
0 50 100 150 200 250
80 60 40 20 0
300 250 IOUT=100mA 200 IOUT=80mA 150 IOUT=50mA 100 50 0 -20 0 20 40 60 80 100
Difference between input and output voltages VDROP (mV)
Ambient temperature Ta (C)
160 140
Backup Di forward direction voltage VF (V)
Backup Di Forward Direction Current vs. Voltage
Backup Di Forward Direction Voltage vs. Ambint Temperature 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 -20 0 20 40 60 80 100 Ambient temperature Ta (C) IF=1A IF=100A IF=10A
c d f
120 100 80 60 40 20 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
Backup Di forward direction voltage VF (V)
RES "L" output voltage VOL (RES) (mV)
RES "L" output voltage VOL (RES) (mV)
80 70 60 50 40 30 20 10 0
RES "L" Output Voltage vs . Ambient Temperature 80 70 60 50 40 30 20 10 0 VIN=3V Isink =1mA
RES "L" Output Voltage vs. Ambient Temperature VIN=2V Isink =1mA
-20 0 20 40 60 80 100 Ambient temperature Ta (C)
-20 0 20 40 60 80 100 Ambient temperature Ta (C)
REJ03D0528-0200 Rev.2.00 Jun 15, 2007 Page 9 of 12
M62023L/P/FP
CS "L" Output Voltage vs. Ambint Temperature 160 140 120 100 80 60 40 20 0 -20 0 20 40 60 80 100 Ambint temperature Ta (C) VIN=3V Isink =1mA CS "H" Output Voltage vs. Ambient Temperature VIN=2V RCS=1M
CS "H" output voltage VOH (CS) (mV)
CS "L" output voltage VOL (CS) (mV)
4.0 3.8 3.6 3.4 3.2 3.0 2.8 2.6 2.4
-20 0 20 40 60 80 100 Ambient temperature Ta (C)
1000
7 5 3
Delay Time vs. External Capacitance Connected to The Ct Pin 40 VIN=0V 3V
Delay time tpd (ms)
Delay Time vs. Ambient Temperature VIN=0V 3V Ct=4.7A
35 30 25 20 15 10 5
Delay time tpd (ms)
2
100
7 5 3 2
10
7 5 3 2
1 0.1
2 3 57
1
23
57
10
23
57
100
0
External capacitance connected to the Ct pin Ct (F)
-20 0 20 40 60 80 100 Ambient temperature Ta (C)
REJ03D0528-0200 Rev.2.00 Jun 15, 2007 Page 10 of 12
M62023L/P/FP
Package Dimensions
JEITA Package Code P-SIP8-6.4x19-2.54 RENESAS Code PRSS0008AA-A Previous Code 8P5 MASS[Typ.] 0.73g
19.0
0.2
2.8
0.2
6.4
1.2 Min
2.54
0.5
0.1
0.85
+0.3 -0.1
3.0 Min
8.3 Max
1.2 0.1
+0.07 -0.05
1.2 +0.1 -0.3
0.27
JEITA Package Code P-DIP8-6.3x8.84-2.54
RENESAS Code PRDP0008AA-A
Previous Code 8P4
MASS[Typ.] 0.5g
8
5
c
1
4
*1
e1
E
*2 D
NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET.
A
Reference Symbol
A2
Dimension in Millimeters
SEATING PLANE *3 b 3 bp e *3 b 2
e1 D E A A1 A2 bp b2 b3 c e L
Min Nom Max 7.32 7.62 7.92 8.7 8.9 9.1 6.15 6.3 6.45 4.5 0.51 3.3 0.4 0.5 0.6 0.9 1.0 1.3 1.4 1.5 1.8 0.22 0.27 0.34 15 0 2.29 2.54 2.79 3.0
REJ03D0528-0200 Rev.2.00 Jun 15, 2007 Page 11 of 12
L
A1
M62023L/P/FP
JEITA Package Code P-SOP8-4.4x4.85-1.27 RENESAS Code PRSP0008DE-C Previous Code -- MASS[Typ.] 0.1g
*1
D
F
8
5
NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET.
bp
HE E
*2
Index mark
Terminal cross section ( Ni/Pd/Au plating )
1 Z e 4
*3
c
Reference Symbol
Dimension in Millimeters
bp
x
M L1
A1
L
y
Detail F
D E A2 A1 A bp b1 c c1 HE e x y Z L L1
A
A2
Min Nom Max 4.65 4.85 5.05 4.2 4.4 4.6 1.85 0.00 0.1 0.20 2.03 0.34 0.4 0.46 0.15 0.20 0.25 0 8 5.7 6.2 6.5 1.12 1.27 1.42 0.12 0.10 0.75 0.25 0.45 0.65 0.90
JEITA Package Code P-SOP8-4.4x5-1.27
RENESAS Code PRSP0008DA-A
Previous Code 8P2S-A
MASS[Typ.] 0.07g
8
5
HE
*1
E
F
1
Index mark
4
NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET.
c
A2 A1
*2
D
Reference Symbol
Dimension in Millimeters
*3 e y
bp
D E A2 A1 A bp c HE e y L
Detail F
Min Nom Max 4.8 5.0 5.2 4.2 4.4 4.6 1.5 0.05 1.9 0.35 0.4 0.5 0.13 0.15 0.2 0 10 5.9 6.2 6.5 1.12 1.27 1.42 0.1 0.2 0.4 0.6
A
REJ03D0528-0200 Rev.2.00 Jun 15, 2007 Page 12 of 12
L
Sales Strategic Planning Div.
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
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When exporting the products or technology described herein, you should follow the applicable export control laws and regulations, and procedures required by such laws and regulations. 4. All information included in this document such as product data, diagrams, charts, programs, algorithms, and application circuit examples, is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas products listed in this document, please confirm the latest product information with a Renesas sales office. Also, please pay regular and careful attention to additional and different information to be disclosed by Renesas such as that disclosed through our website. (http://www.renesas.com ) 5. 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